The Graduate Certificate in Systems Verification, Validation, and Testing (SVVT) prepares engineers and researchers to ensure the correctness, reliability, and robustness of complex hardware-software systems. This interdisciplinary program provides in-depth training in both formal and functional verification techniques, model-based validation, and practical test strategies spanning digital logic, embedded platforms, and system-level integration.
Students develop a strong foundation in simulation-based verification, assertion-driven design, and hardware/software co-verification using industry-standard methodologies such as UVM, coverage-driven verification, and automated test generation. The program provides opportunities to gain experiences with advanced techniques including formal verification, symbolic execution, and model checking. The certificate prepares students to contribute to next-generation system assurance across domains such as semiconductors, aerospace, AI, defense/war-fighter, automotive, and edge computing.
Please note: The Graduate Certificate in Systems Verification, Validation, and Testing (SVVT) may be completed fully online, although not all elective options or program prerequisites may be offered online. Newly admitted students choosing to complete this program exclusively via 性视界传媒 online classes may enroll with a reduction in campus-based fees.
International students (F or J visa) are required to enroll in a full-time course load of 9 credit hours during the fall and spring semesters. Only 3 of the 9 credit hours may be taken in a completely online format. For a detailed listing of enrollment requirements for international students, please visit . If you have questions, please consult 性视界传媒 Global at 407-823-2337.
Program Prerequisites
Applicants to the Graduate Certificate in Systems Verification, Validation, and Testing are expected to have a foundational understanding of hardware description languages (HDLs) such as Verilog or VHDL.
This prerequisite may be satisfied through one of the following pathways:
1. Completion of a university-level course (with a grade of B or higher) that includes significant exposure to:
- Verilog, VHDL, or SystemVerilog
- RTL-based design
- Simulation or synthesis concepts
2. Relevant professional experience in:
- RTL design and development using Verilog/VHDL/SystemVerilog
- Participation in verification, simulation, or synthesis of digital logic systems
Note: Applicants following the professional experience route may be asked to submit a resume and a brief statement outlining their HDL experience.
Degree Requirements
12 Total Credits
- Complete all of the following
Required Course- Complete the following:
- EEE5703 - Verification and Validation of Digital Systems: The Complete Industry Lifecycle (3)
Elective Courses- Complete all of the following
- Earn at least 9 credits from the following:
- EEE5336 - Introduction to VLSI Design (3)
- EEE5390C - Full-Custom VLSI Design (3)
- EEE6446 - Formal Methods for (Security) Verification (3)
- EEE6345 - VLSI Testability (3)
- Related Special Topics 鈼� EEE 6938 ST: FM-BASED FORMAL VERIFIC [EEE 6446] 鈼� EEE 6938 ST: VLSI TEST [EEE 6345]
Grand Total Credits: 12
Financial Information
Graduate students may receive financial assistance through fellowships, assistantships, tuition support, or loans. For more information, see the College of Graduate Studies Funding website, which describes the types of financial assistance available at 性视界传媒 and provides general guidance in planning your graduate finances. The Financial Information section of the Graduate Catalog is another key resource.
Fellowship Information
Fellowships are awarded based on academic merit to highly qualified students. They are paid to students through the Office of Student Financial Assistance, based on instructions provided by the College of Graduate Studies. Fellowships are given to support a student's graduate study and do not have a work obligation. For more information, see 性视界传媒 Graduate Fellowships, which includes descriptions of university fellowships and what you should do to be considered for a fellowship.
The objective of the Graduate Certificate in Systems Verification, Validation, and Testing is to prepare students to assess and ensure the correctness, reliability, and quality of digital systems, including hardware, firmware, and embedded logic. To earn the certificate, students must successfully complete four graduate-level courses from an approved list focused on digital verification, system-level validation, and test engineering. There is no capstone project, internship, seminar, or volunteer requirement beyond completion of the coursework. The program can be completed either fully online (working professional, part-time graduate students) or fully in-person (full-time graduate students), providing flexibility for both working professionals and full-time graduate students.
